[riot-commits] [RIOT-OS/RIOT] de5051: cc26x2_cc13x2: use correct RAM value

benpicco noreply at github.com
Tue Feb 11 15:43:41 CET 2020


  Branch: refs/heads/master
  Home:   https://github.com/RIOT-OS/RIOT
  Commit: de50518146b356f53482da46d3080f028e26baa7
      https://github.com/RIOT-OS/RIOT/commit/de50518146b356f53482da46d3080f028e26baa7
  Author: Jean Pierre Dudey <jeandudey at hotmail.com>
  Date:   2020-02-10 (Mon, 10 Feb 2020)

  Changed paths:
    M cpu/cc26x2_cc13x2/Makefile.include
    M examples/dtls-echo/Makefile.ci
    M examples/dtls-sock/Makefile.ci
    M examples/dtls-wolfssl/Makefile.ci
    M examples/gnrc_border_router/Makefile.ci
    M examples/javascript/Makefile.ci
    M examples/lua_REPL/Makefile.ci
    M examples/lua_basic/Makefile.ci
    M tests/gnrc_netif/Makefile.ci
    M tests/unittests/Makefile.ci

  Log Message:
  -----------
  cc26x2_cc13x2: use correct RAM value

Previous value was 20 K, now it's 80 K. The older family of these MCUs
(cc13x0, cc26x0) had that size, currently for cc13x2 and cc26x2 it's
80 K.

Signed-off-by: Jean Pierre Dudey <jeandudey at hotmail.com>


  Commit: 628aa1197e805ec73e0ce7e2d9bd64e571519ce2
      https://github.com/RIOT-OS/RIOT/commit/628aa1197e805ec73e0ce7e2d9bd64e571519ce2
  Author: benpicco <benjamin.valentin at ml-pa.com>
  Date:   2020-02-11 (Tue, 11 Feb 2020)

  Changed paths:
    M cpu/cc26x2_cc13x2/Makefile.include
    M examples/dtls-echo/Makefile.ci
    M examples/dtls-sock/Makefile.ci
    M examples/dtls-wolfssl/Makefile.ci
    M examples/gnrc_border_router/Makefile.ci
    M examples/javascript/Makefile.ci
    M examples/lua_REPL/Makefile.ci
    M examples/lua_basic/Makefile.ci
    M tests/gnrc_netif/Makefile.ci
    M tests/unittests/Makefile.ci

  Log Message:
  -----------
  Merge pull request #13331 from btcven/2020_02_10-sram-size

cc26x2_cc13x2: use correct RAM value


Compare: https://github.com/RIOT-OS/RIOT/compare/34bc658ac6e0...628aa1197e80


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