[riot-commits] [RIOT-OS/RIOT] 52107b: esp8266: Support UART1 and other UART0 pins.

Francisco noreply at github.com
Mon May 3 08:03:11 CEST 2021


  Branch: refs/heads/master
  Home:   https://github.com/RIOT-OS/RIOT
  Commit: 52107b2416079755f9280066bbe692f4a3a12630
      https://github.com/RIOT-OS/RIOT/commit/52107b2416079755f9280066bbe692f4a3a12630
  Author: iosabi <iosabi at protonmail.com>
  Date:   2021-05-02 (Sun, 02 May 2021)

  Changed paths:
    M boards/common/esp8266/include/periph_conf_common.h
    M cpu/esp8266/include/periph_cpu.h
    M cpu/esp8266/periph/gpio.c
    M cpu/esp_common/periph/uart.c

  Log Message:
  -----------
  esp8266: Support UART1 and other UART0 pins.

The esp8266 CPU has actually two hardware UART peripherals. UART0 is
used by the boot ROM for flashing and serial output during boot,
typically at a baudrate of 74880 bps until the bootloader or application
sets the more standard 115200 baudrate. This UART0 device has two
possible pins for TXD, GPIO1 and GPIO2, which are both set to TXD by the
boot ROM. esp8266 modules will typically have GPIO1 labeled as the TX
pin, but it is possible to use GPIO2 for that purpose even while
flashing the device with esptool.py.

The second device, UART1, also has two options for TXD, GPIO2 and GPIO7,
and only one option for RXD, GPIO8. However, GPIO7 and GPIO8 are used
by the flash internally so those options are not very useful unless
maybe while running from IRAM with the flash disabled, for example for
a debugger over UART1.

This patch allows boards to override UART{0,1}_{R,T}XD in their
periph_conf.h to configure the uart selection. Defining UART1_TX will
make the UART_DEV(1) device available.

Tested with:

```CFLAGS='-DUART1_TXD=GPIO2' make -C tests/periph_uart BOARD=esp8266-esp-12x flash term```

* Connected one USB-UART to the standard GPIO1 and GPIO3 for flashing
  and console. After flashing we see the manual test output at 115200
  bps

* Connected a second USB-UART with RX to GPIO2 running at 74880.

Then run on the first console:
```
> init 1 74880
> send 1 hello
```

The word "hello" appears on the second UART connection.

Note that GPIO2 is used during boot for UART0's TX until the application
or bootloader set it to a regular GPIO, so some boot ROM messages at
74880 bps are visible. After running `init 1 74880` it is set to UART1's
TX.


  Commit: 3c5c3ba4af1be681225267ab54a99100599aa771
      https://github.com/RIOT-OS/RIOT/commit/3c5c3ba4af1be681225267ab54a99100599aa771
  Author: Francisco <femolina at uc.cl>
  Date:   2021-05-03 (Mon, 03 May 2021)

  Changed paths:
    M boards/common/esp8266/include/periph_conf_common.h
    M cpu/esp8266/include/periph_cpu.h
    M cpu/esp8266/periph/gpio.c
    M cpu/esp_common/periph/uart.c

  Log Message:
  -----------
  Merge pull request #16387 from iosabi/esp8266_uart

esp8266: Support UART1 and other UART0 pins.


Compare: https://github.com/RIOT-OS/RIOT/compare/08f1f9768d23...3c5c3ba4af1b


More information about the commits mailing list