[riot-devel] Implementation of the hardware timers / case of MSP430

ROUSSEL Kévin Kevin.Roussel at inria.fr
Wed Aug 21 17:18:43 CEST 2013

Le 21/08/2013 14:29, ROUSSEL Kévin a écrit :
> Le 21/08/2013 11:55, Oleg Hahm a écrit :
>> I'm not aware of any reason not to use the TimerB module, it's just not
>> implemented yet, but that shouldn't be too difficult.
> I think I will submit a pull request to that end.
>> Cheers,
>> Oleg
> Thank you,

Well, I'm working on it right now. While doing this, I stumbled upon 
something that I find a bit strange.

In the 'hwtimer_msp430.c' module, the TIMERA0 interrupt handler is 
tasked with incrementing the 'timer_round' variable, which is---if I 
understand correctly---containing the 16 most significant bits of the 
hardware timer reference counter (thus being able to count on 32-bit 
even on a MSP430).
Shouldn't this incrementation be instead done in the TIMERA1 interrupt 
handler, when the TAIFG flag is set? It seems much more appropriate (we 
can't even be sure that the CCR0 comparator is set at any time).
Another related problem is that the TAIE/TAIFG mechanism that is 
supposed to detect that situation is disabled in the init function.

Plus: the 'hwtimer_cc430.c' module seems to handle the counter overflow 
the way I say above. This one doesn't seem to handle the 32-bit 
extension to the hardware counter though (maybe is that because this 
module is lagging behind the msp430gcc one?)

Should I also change all of this while I'm on it?

      Kévin Roussel
      Doctorant, projet LAR
      Équipe MADYNES, INRIA Nancy Grand-Est / LORIA
      Tél. : +33 3 54 95 86 27
      Kevin.Roussel at inria.fr

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