[riot-devel] Implementation of the hardware timers / case of MSP430

Milan Babel babel at inf.fu-berlin.de
Wed Aug 21 17:28:23 CEST 2013


Hi,

> Well, I'm working on it right now. While doing this, I stumbled upon 
> something that I find a bit strange.
>
> In the 'hwtimer_msp430.c' module, the TIMERA0 interrupt handler is 
> tasked with incrementing the 'timer_round' variable, which is---if I 
> understand correctly---containing the 16 most significant bits of the 
> hardware timer reference counter (thus being able to count on 32-bit 
> even on a MSP430).
yes thats correct.
> Shouldn't this incrementation be instead done in the TIMERA1 interrupt 
> handler, when the TAIFG flag is set? It seems much more appropriate 
> (we can't even be sure that the CCR0 comparator is set at any time).
No because this interrupt is only enabled when setting a timer, the 
TIMERA0 is wasted to only count the overflows.
> Another related problem is that the TAIE/TAIFG mechanism that is 
> supposed to detect that situation is disabled in the init function.
That's no problem because hwtimer_arch_init does a 
TA0_enable_interrupt(0) to archive this.
>
> Plus: the 'hwtimer_cc430.c' module seems to handle the counter 
> overflow the way I say above. This one doesn't seem to handle the 
> 32-bit extension to the hardware counter though (maybe is that because 
> this module is lagging behind the msp430gcc one?)
Yes the cc430 does not use the overflow only the msp430-common.
But even there it is broken at the moment:
hwtimer_arch_now does not return the full number with the overflow and 
in hwtimer_arch_set an unsigned int is too small on a msp430 to hold an 
unsigned 32bit int.
I am trying to resolve this.

Regards,
   Milan


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