[riot-devel] PWM on STM32-L1

Peter Kietzmann peter.kietzmann at haw-hamburg.de
Thu Mar 19 09:06:18 CET 2015

Hello Vivien & Co.,

and welcome to RIOT! Let my try to bring some light into the dark :-) . 
You'll find my comments inline. The general idea of the "periph_conf.h" 
is a RIOT specific hardware/pin abstraction. Is it correct assuming you 
have a stm32 nucleo-l1 board?

Am 17.03.2015 um 14:50 schrieb Vivien Michel:
> Hello,
> We are four students, working on riot-os implementation for STM32-L1. 
> But we are facing some problems : we're trying to add PWM features in 
> order to use a motor shield. We already have implemented the pwm.h for 
> our board. And now we're having a hard time understanding how we 
> should proceed with the periph_conf.h file.

The pwm.h is a peripheral interface which you can find in 
"RIOT/drivers/include/periph/pwm.h". You'll need to fulfill this API 
with your driver implementation but NOT adapt it. It is designed to 
match the basic functionalities.

> Actually, our main confusion comes from the defines that we have to 
> use to configure the pwm pins.

As stated above, the periph_conf.h decouples hardware-specific stuff 
from the RIOT naming-scheme. For example, you can setup the pin PA09 on 
the board and name it GPIO_0 in RIOT.

> - Regarding the channels, we don't really get what it refers to ? Do 
> the values defined for these channels directly correspond to the 
> number written on the board near the pins (numbers 3, 5, 6, 9, 10 and 
> 11 on the stm32l1) ? Why are there four channels defined for each pwm 
> pins in the stm32f3discovery's periph_conf.h ?

Comparing the stm32f3discovery you can have multiple PWM channels on one 
port. Each channel can fulfill a separate PWM and therefore has its own 
pin. On stm32f3discovery there are two ports with four channels each. 
For your first implementation you don't need to implement multiple 
channels per board. One working PWM (pin) should be enough to validate 
the driver.
You can not compare the numbers written on the stm32 nuclea-l1 and the 
stm32f3discovery. I guess you need to understand the I/O pin multiplexer 
in general. Please read [1] p.175 sec. 7.3.2.

> - What values should we use for the PWM_X_DEV, PWM_X_CLKEN(), 

Did you have a look at the CMSIS header? You can find it in 
RIOT/cpu/stm32l1/include/stm32l1xx.h. There, all registers and cpu 
specific configurations are named. You should have a look at (i) the use 
of this file comparing for example to the gpio implementation and (ii) 
compare the stm32f3 PWM implementation. You will see that the PWM 
especially depends by timers (TIMx). You'll also need to enable bus 
clocks for the peripherals. You can find all principles in the stm32f3 
implementation as this is really similar to the stm32l1 i think. Also 
you can find everithing in the manual [1].

> - For the PWM_X_PORT, should we use GPIOC and GPIOD as it is done for 
> the stm32f3 ?

You need to go into the manual and see where you can map these pins to. 
It think it is not possible on every port and every pin for each 
potential function. Select a port and pin where no other peripheral 
function is placed.

> - Should we disable the pins in the GPIO config if we want to use them 
> as PWM ?

Please try to avoid multiple functions for one pin. Then you don't have 
to disable them.

> We would be very grateful for any help.
Are you fine now, any further questions?

> Best regards.

> _______________________________________________
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Peter Kietzmann

Hamburg University of Applied Sciences
Dept. Informatik, Internet Technologies Group
Berliner Tor 7, 20099 Hamburg, Germany
Fon: +49-40-42875-8426
Web: http://www.haw-hamburg.de/inet

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