[riot-devel] AES crypto optimizations, speed and size
ludwig.knuepfer at fu-berlin.de
Tue Jan 2 17:26:51 CET 2018
First of all thank you for sharing your insights!
While I'm not entirely sure I get all the implications right away I do have the following thoughts:
I assume the results can not be generalized for the CPU architecture because CPU clock and flash reading speed does vary independently.
I do expect the result depends on the concrete product and configuration you're looking at. A factor 2 memory access speed difference in between all cortex m products does not seem very unlikely to me.
Did you factor this in to your conclusion? Any thoughts?
Am 2. Januar 2018 17:06:32 MEZ schrieb Oleg Artamonov <oleg at unwds.com>:
>devel mailing list
>devel at riot-os.org
-------------- next part --------------
An HTML attachment was scrubbed...
More information about the devel