[riot-devel] EFM32 timers, PWM and xtimer
basstottelaar at gmail.com
Mon Nov 12 17:54:09 CET 2018
The two timers are needed, because they run in cascade mode. Only that way,
I can generate values for XTIMER_HZ that have sufficient resolution. I
don't recall the details, but I haven't found another way. The recommended
MCU oscillators are typically 38.4 or 40 MHz, and the prescaler is always a
power of two, so I cannot get 1us precision with only one timer.
The newer chips have an additional 32-bit timer with the same problem, but
this frees up timers for PWM. I have a PR that I still need to fix though
Op ma 12 nov. 2018 om 17:40 schreef chrysn <chrysn at fsfe.org>:
> Hello RIOT developers,
> working with the EFM32 port trying to use some PWM pins, I found that of
> the four TIMER peripherals (each of which is tied to particular sets of
> PWM pins it can drive), two adjacent ones are in use
> for a combined RIOT timer peripheral that them forms also the
> XTIMER_DEV. This means that two timers (1 and 2 of 0, 1, 2 and 3) are
> practically unusable for any PWM.
> Before I go head-first into hacking something together with a timer
> implementation based on the RTC or the systick peripheral, was there a
> particular rationale behind making this the default timer on EFM32?
> AFAICS, the design does make sense when it comes to creating arbitrary
> timers (where the lower timer gets its fine-grained top value output a
> precise frequency), but that isn't really required when it comes to
> providing a timer for XTIMER which has its own XTIMER_HZ value which
> "just" needs to set to an adaequate value. How is the trade-off between
> having PWM devices vs. having a fine-grained-fixed-frequency capable
> timer usually handled?
> : That's a limitation of the chips, where TIMEROUF only works
> between adjacent timers.
> To use raw power is to make yourself infinitely vulnerable to greater
> -- Bene Gesserit axiom
> devel mailing list
> devel at riot-os.org
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