[riot-notifications] [RIOT-OS/RIOT] cpu/atmega: WIP implementation of pin change interrupts (#7610)
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Mon Sep 18 15:23:15 CEST 2017
> Another option (which is what is done in the STM32 IRQ lines) is tho allow only 1/vector. This means 4 (not anymore 32, in the worst case). Actually 3, considering that one vector is used for the context switch.
> I would prefer the laster (I've it working locally but never got the time to cleanup and publish it). What do you think?
So what restrictions will this result in? I am not able to use all my PCINTs at the same time, or worst case only one per port? This would not be an option for me.
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