[riot-notifications] [RIOT-OS/RIOT] clicker, wifire: Add SPI peripheral support (#7383)

Kaspar Schleiser notifications at github.com
Sat Sep 30 23:35:08 CEST 2017


kaspar030 requested changes on this pull request.



> @@ -30,6 +31,10 @@ void board_init(void)
     uart_init(DEBUG_VIA_UART, DEBUG_UART_BAUD, NULL, 0);
 #endif
 
+    /* Initialise all SPI modules */

please use periph_common init.c version

> @@ -59,6 +62,48 @@ extern "C" {
 #define DEBUG_UART_BAUD     (9600)
 /** @} */
 
+
+/**
+ * @name    SPI device configuration
+ *
+ * @{
+ */
+
+static const spi_conf_t spi_config[] = {
+    {}, /* No SPI0 on PIC32 */

what does that mean? why not start the array at zero?

> @@ -34,6 +35,10 @@ void board_init(void)
 
     hwrng_init();
 
+    /* Initialise all SPI modules */

duplicate code

> +#define SPIxCON2(U)         ((U).regs[0x40 / 4])
+#define SPI_REGS_SPACING    (_SPI2_BASE_ADDRESS - _SPI1_BASE_ADDRESS)
+
+/* PERIPHERAL_CLOCK must be defined in board file */
+
+
+typedef struct PIC32_SPI_tag {
+    volatile uint32_t   *regs;
+} PIC32_SPI_T;
+
+static PIC32_SPI_T pic_spi[SPI_NUMOF + 1];
+static mutex_t locks[SPI_NUMOF + 1];
+
+void spi_init(spi_t bus)
+{
+    assert(bus != 0 && bus <= SPI_NUMOF);

please add parens

> +static PIC32_SPI_T pic_spi[SPI_NUMOF + 1];
+static mutex_t locks[SPI_NUMOF + 1];
+
+void spi_init(spi_t bus)
+{
+    assert(bus != 0 && bus <= SPI_NUMOF);
+
+    mutex_init(&locks[bus]);
+
+    PMD5SET = _PMD5_SPI1MD_MASK << (bus - 1);
+    spi_init_pins(bus);
+}
+
+void spi_init_pins(spi_t bus)
+{
+    assert(bus != 0 && bus <= SPI_NUMOF);

parens

> +
+void spi_init_pins(spi_t bus)
+{
+    assert(bus != 0 && bus <= SPI_NUMOF);
+
+    gpio_init(spi_config[bus].mosi_pin, GPIO_OUT);
+    gpio_init(spi_config[bus].miso_pin, GPIO_IN);
+    *(spi_config[bus].mosi_reg) = spi_config[bus].mosi_af;
+    *(spi_config[bus].miso_reg) = spi_config[bus].miso_af;
+}
+
+int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
+{
+    volatile int rdata __attribute__((unused));
+
+    assert(bus != 0 && bus <= SPI_NUMOF);

parens

> +            SPIxCONSET(pic_spi[bus]) = _SPI1CON_CKP_MASK;
+            break;
+        default:
+            return SPI_NOMODE;
+    }
+
+    SPIxBRG(pic_spi[bus]) = (PERIPHERAL_CLOCK / (2 * clk)) - 1;
+    SPIxSTATCLR(pic_spi[bus]) = _SPI1STAT_SPIROV_MASK;
+    SPIxCONSET(pic_spi[bus]) = (_SPI1CON_ON_MASK | _SPI1CON_MSTEN_MASK);
+
+    return SPI_OK;
+}
+
+void spi_release(spi_t bus)
+{
+    assert(bus != 0 && bus <= SPI_NUMOF);

parens again here (and more in this PR)

> +    SPIxCON(pic_spi[bus]) = 0;
+
+    PMD5SET = _PMD5_SPI1MD_MASK << (bus - 1);
+
+    mutex_unlock(&locks[bus]);
+}
+
+void spi_transfer_bytes(spi_t bus, spi_cs_t cs, bool cont,
+                        const void *out, void *in, size_t len)
+{
+    const uint8_t *out_buffer = (const uint8_t*)out;
+    uint8_t *in_buffer = (uint8_t*)in;
+
+    assert(bus != 0 && bus <= SPI_NUMOF);
+
+    if (cs != SPI_CS_UNDEF)

{} missing

> +    while (len--) {
+        uint8_t rdata;
+
+        if (out_buffer) {
+            SPIxBUF(pic_spi[bus]) = *out_buffer++;
+
+            /* Wait until TX FIFO is empty */
+            while (!(SPIxSTAT(pic_spi[bus]) & _SPI1STAT_SPITBE_MASK)) {}
+        }
+
+        /* Wait until RX FIFO is not empty */
+        while (!(SPIxSTAT(pic_spi[bus]) & _SPI1STAT_SPIRBF_MASK)) {}
+
+        rdata = SPIxBUF(pic_spi[bus]);
+
+        if (in_buffer)

{}

> +            SPIxBUF(pic_spi[bus]) = *out_buffer++;
+
+            /* Wait until TX FIFO is empty */
+            while (!(SPIxSTAT(pic_spi[bus]) & _SPI1STAT_SPITBE_MASK)) {}
+        }
+
+        /* Wait until RX FIFO is not empty */
+        while (!(SPIxSTAT(pic_spi[bus]) & _SPI1STAT_SPIRBF_MASK)) {}
+
+        rdata = SPIxBUF(pic_spi[bus]);
+
+        if (in_buffer)
+            *in_buffer++ = rdata;
+    }
+
+    if (!cont && cs != SPI_CS_UNDEF)

{}

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