[riot-notifications] [RIOT-OS/RIOT] cpu/atmega_common: RTT and RTC support (#8842)

Marian Buschsieweke notifications at github.com
Thu Apr 18 17:48:09 CEST 2019

maribu commented on this pull request.

> +        /* Clear interrupt flag */
+        TIFR2 = (1 << OCF2A);
+        /* Enable interrupt */
+        TIMSK2 |= (1 << OCIE2A);
+        DEBUG("RTT alarm interrupt active\n");
+    }
+    else {
+        DEBUG("RTT alarm interrupt not active\n");
+    }
+uint32_t rtt_get_alarm(void)
+    return (((uint32_t)rtt_state.ext_comp << 8) | (uint32_t)OCR2A);

Somehow my inline comments vanished.

Here you are accessing `rtt_state_ext_comp`, which is 16 bit of RAM. On an 8-bit CPU this access will be two instructions. Afterwards you'll access `OCR2A`, which will add more instructions. If between those instructions an interrupt kicks in and a different thread gets scheduled `rtt_state.ext_comp` may be changed. As a result the two 8 bit chunks of `rtt_state.ext_comp` accessed might belong to different states of `rtt_state.ext_comp` and might combined have a result that was neither correct before nor after the interrupt. This is racy and `volatile` is not helping here. Also C11 atomics will not help (but at least fail on compilation), as there is no way to read both `rtt_sate.ext_comp` and `OCR2A` in one instant.

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