[riot-notifications] [RIOT-OS/RIOT] cpu/atmega_common: RTT and RTC support (#8842)

Marian Buschsieweke notifications at github.com
Fri Apr 19 22:51:04 CEST 2019

@ZetaR60: I did some more research regarding moving memory access to globals around accesses to volatiles:

[This write up by Prof John Regehr](https://blog.regehr.org/archives/28a) states that there two fractions:

> One school of thought is that compilers may not move accesses to global variables around accesses to volatile variables.  There seems to be a consistent reading of the standard that backs this up.

But he states most compilers (at least back in 2010) share exactly your view on that, so that they do move access to non-`volatile` globals around accesses to volatiles. So your claim that additional measures need to be taken to prevent that reordering is 100% correct. (And obviously it doesn't even matter whether or not my reading of the standard is correct, as in the end we will have to work with real world compiler and how they do things.)

I'd still suggest to use the compiler memory barrier instead of `volatile` to prevent the reordering. This will prevent optimisation just as much as needed, and also the intent of the code will be more readable.

Memo to my self: A PR adding memory barriers e.g. via `static inline void memory_barrier(void) { asm....}` would be nice.

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