[riot-notifications] [RIOT-OS/RIOT] sam0 flashpage: wait for READY bit in INTFLAG after write command (#10880)

Federico Pellegrin notifications at github.com
Sun Jan 27 07:47:59 CET 2019

### Contribution description
While debugging on an issue with RWWEE (see devel mailing list) I saw in the SAML manual:

> Procedure for Manual Page Writes (CTRLB.MANW=1)
> The row to be written to must be erased before the write command is given.
> • Write to the page buffer by addressing the NVM main address space directly
> • Write the page buffer to memory: CTRL.CMD='Write Page' and CMDEX
> • The READY bit in the INTFLAG register will be low while programming is in progress, and access
> through the AHB will be stalled

And noticed that the last point, waiting for the READY bit in INTFLAG, was actually missing in current code (while it is done correctly for example for the erase cycle).
While I didn't notice myself any problem until now with the code without this READY bit waiting, I believe it may be more correct to add this code and prevent possible race conditions and strange errors.

### Testing procedure
On SAMx boards you can run the automated test in _tests/periph_flashpage_.

You can view, comment on, or merge this pull request online at:


-- Commit Summary --

  * sam0 flashpage: wait for READY bit in INTFLAG after write command

-- File Changes --

    M cpu/sam0_common/periph/flashpage.c (6)

-- Patch Links --


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