[riot-notifications] [RIOT-OS/RIOT] boards/nucleo-l4r5zi: initial basic support (#8939)

Francisco notifications at github.com
Fri Jul 5 13:19:44 CEST 2019


fjmolinas requested changes on this pull request.

Ran python dist/tools/compile_and_test_for_board/compile_and_test_for_board.py --jobs 1 . nucleo-l4r5zi":
```
Failures during test:
- [tests/gnrc_ipv6_ext](tests/gnrc_ipv6_ext/test.failed)
- [tests/gnrc_rpl_srh](tests/gnrc_rpl_srh/test.failed)
- [tests/gnrc_sock_dns](tests/gnrc_sock_dns/test.failed)
```


In general it is all good, I think some features can be added. I would insist on RTC/RTT since they are quite easy (I tested for both), same for riotboot.

This PR also needs documentation.

> +#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @name    Clock system configuration
+ * @{
+ */
+/* 0: no external high speed crystal available
+ * else: actual crystal frequency [in Hz] */
+#define CLOCK_HSE           (0)
+
+#ifndef CLOCK_LSE
+/* 0: no external low speed crystal available,
+ * 1: external crystal available (always 32.768kHz)
+ * This defaults to 0 because hardware revision 'MB1136 C-01' of the nucleo-64

This is a nucleo-144

> +
+/**
+ * @name    Clock system configuration
+ * @{
+ */
+/* 0: no external high speed crystal available
+ * else: actual crystal frequency [in Hz] */
+#define CLOCK_HSE           (0)
+
+#ifndef CLOCK_LSE
+/* 0: no external low speed crystal available,
+ * 1: external crystal available (always 32.768kHz)
+ * This defaults to 0 because hardware revision 'MB1136 C-01' of the nucleo-64
+ * board disconnects LSE by default. You may safely set this to 1 on revisions
+ * newer than 'MB1136 C-01' */
+#define CLOCK_LSE           (0)

Also it has by default a 32786 oscilator so this can be enabled.

> @@ -210,12 +211,16 @@ ISR_VECTOR(1) const isr_t vector_cpu[CPU_IRQ_NUMOF] = {
     [OTG_FS_IRQn             ] = isr_otg_fs,               /* [67] USB OTG FS global Interrupt */
     [SAI2_IRQn               ] = isr_sai2,                 /* [75] Serial Audio Interface 2 global interrupt */
 #endif
-#if defined(CPU_MODEL_STM32L432KC) || defined(CPU_MODEL_STM32L476RG) || \
-    defined(CPU_MODEL_STM32L476VG) || defined(CPU_MODEL_STM32L475VG) || \
-    defined(CPU_MODEL_STM32L496ZG)
+#if defined(CPU_MODEL_STM32L432KC) || defined(CPU_MODEL_STM32L433RC) || \

Unrelated Change `defined(CPU_MODEL_STM32L433RC)`

>      [TIM7_IRQn               ] = isr_tim7,                 /* [55] TIM7 global interrupt */
+    [QUADSPI_IRQn            ] = isr_quadspi,              /* [71] Quad SPI global interrupt */

Duplicated with below.

> @@ -52,6 +54,8 @@ extern "C" {
 #define CPU_IRQ_NUMOF                   (83U)
 #elif defined(CPU_MODEL_STM32L496ZG)
 #define CPU_IRQ_NUMOF                   (91U)
+#elif defined(CPU_MODEL_STM32L4R5ZI)
+#define CPU_IRQ_NUMOF                   (95U)

Where does this come from, I counted 83 enabled for this cpu.

> @@ -0,0 +1,13 @@
+# Put defined MCU peripherals here (in alphabetical order)
+FEATURES_PROVIDED += periph_i2c
+FEATURES_PROVIDED += periph_spi
+FEATURES_PROVIDED += periph_timer
+FEATURES_PROVIDED += periph_uart periph_lpuart

rtt/rtc can be added, also riotboot.

> @@ -0,0 +1,13 @@
+# Put defined MCU peripherals here (in alphabetical order)
+FEATURES_PROVIDED += periph_i2c
+FEATURES_PROVIDED += periph_spi
+FEATURES_PROVIDED += periph_timer
+FEATURES_PROVIDED += periph_uart periph_lpuart

I'd rather have them in different lines.

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