[riot-notifications] [RIOT-OS/RIOT] stm32l152re: hard-fault unless power-cycled after flash, or depending on optimization (#11820)

Kaspar Schleiser notifications at github.com
Tue Jul 9 13:31:13 CEST 2019

> @kaspar030 I'm using opencod. The issue is **NOT** present when flashing with st-flash! (thanks for the suggestion).

That means that openocd's flashing code puts the MCU in a state that breaks our code.

Looking at what my openocd does: ```/usr/share/openocd/scripts/target/stm32l1.cfg````, what might be an issue is its HSI handling:

proc stm32l_enable_HSI {} {                                                                                                      
›       # Enable HSI as clock source                                                                                             
›       echo "STM32L: Enabling HSI"                                                                                              
›       # Set HSION in RCC_CR                                                                                                    
›       mww 0x40023800 0x00000101                                                                                                
›       # Set HSI as SYSCLK                                                                                                      
›       mww 0x40023808 0x00000001                                                                                                

Maybe some of the stmclk assumptions are not valid after openocd fiddled with the registers.
Does gdb work on your board? Can you try stepping through the stmclk code and see if it takes a different path after openocd / after cold boot?

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