[riot-notifications] [RIOT-OS/RIOT] i2c_read_regs / i2c_write_regs and endianess (#11544)

Federico Pellegrin notifications at github.com
Sun May 19 08:32:02 CEST 2019

#### Description
I'm working on a 8kb EEPROM connected via I2C to a SAML21. I'm having strange wrap around issues on memory writing. After some debug my feeling is that the `i2c_write_regs` and `i2c_read_regs` functions do not take into account the endianess of the CPU and do work only with big endian code.

Example trying to write to register 0x10 the value 1:
i2c_write_reg(I2C_DEV(0), 0x50, 0x10, 1, I2C_REG16);
Putting some debug prints I see that the write request will generate an address on the bus:
While I would expect the MSB to come first (by specs, but please correct me if I'm wrong as I'm not very used to I2C):
Looking at `i2c_write_regs` the register is received as an `uint16_t` which is then passed down to `i2c_write_bytes` that gets it as `const void *` that is then written physicall in a loop as `const uint8_t *`.
Therefore in little endian machines the LSB will come first, while for big endian machines MSB will come first (as it should).

I think the two regs function should take the endianess into account and always pass the registers data with MSB first to the underneath functions. I believe this should be the place to do it, so the calls to the CPU specific functions underneath already always receive the data as it should be written.

I would gladly do a PR once I get confirmation that I'm not seeing something wrong. Worst case I would suppose this should be documented if it is correct as it is.

Swapping beforehand the register data in my application seems to solve all the troubles.

#### Steps to reproduce the issue
Write some i2c registers using `i2c_write_regs` and see if the data gets written where it should.

#### Versions
RIOT master

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