[riot-notifications] [RIOT-OS/RIOT] cpu/arm7_common: Make irq_*() compiler barriers (#11440)

Marian Buschsieweke notifications at github.com
Thu May 23 09:46:05 CEST 2019


@gschorcht: Can you check if the ESP8266 and the ESP32 implementation of `irq_disable(), `irq_enable()` and `irq_restore()` is not affected by the same bug?

The Xtensa is out-of-order, so a compiler only barrier would not be sufficient there. But maybe the RSIL instruction does implicitly work as a full barrier? (I found no information on that. In other code I only found an `rsync` issued after `wsr` which your code in `irq_restore()` does as well.) If no additional barrier instructions need to be issued in the inline assembly, I still think that the inline assembly should have `memory` as clobber, so that the compiler does not move memory accesses across `irq_disable()` and `irq_restore()`. 

(Note that an external function is not effectively a barrier, as the compiler can move memory access across theses calls once that external function is no longer a black box. That is the case with LTO enabled, see https://github.com/RIOT-OS/RIOT/pull/11438#issuecomment-486961340)

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