[riot-notifications] [RIOT-OS/RIOT] cpu/arm7_common: Make irq_*() compiler barriers (#11440)

Gunar Schorcht notifications at github.com
Fri May 24 10:24:12 CEST 2019

> @gschorcht: Perfect, so only the `memory` clobbers are needed there to make sure the compiler does not move memory accesses wrappen in `irq_disable()` / `irq_restore()` outside of it with LTO enabled.

Sorry to ask again, I'm still not sure whether I understand the problem. If I understood you correclty, you are afraid that LTO might inline the code of these functions and reorder the memory access arround. Right? If so, do you think that this could happen even if the functions are present in ELF binaries?

One other question arose to me related to the topic. GCC for Xtensa knows an option `-mserialize-volatile`. When this option is enabled, GCC inserts `MEMW` instructions before volatile memory references to guarantee sequential consistency. This option is disabled in GCC for ESPs by default. Do you think it makes sense to enable them?

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