[riot-notifications] [RIOT-OS/RIOT] cpu/fe310: fixes for SW interrupt latency issues (#12196)

Kaspar Schleiser notifications at github.com
Tue Sep 10 21:43:25 CEST 2019


kaspar030 commented on this pull request.



>      UNREACHABLE();
 }
 
 void thread_yield_higher(void)
 {
     /* Use SW intr to schedule context switch */
     CLINT_REG(CLINT_MSIP) = 1;
+
+    /* Latency of SW intr can be 4-7 cycles; delay 8 cycles */

could we wait for a volatile variable?

```
static volatile int _barrier;
void thread_yield_higher(void) {
  int barrier_before = _barrier;
  CLINT_REG(CLINT_MSIP) = 1;
  while (_barrier == barrier_before); {}
}
```

... and in the isr do ```_barrier++```. This might need compiler barriers.
Not sure this would actually be shorter than a couple of nops.

-- 
You are receiving this because you are subscribed to this thread.
Reply to this email directly or view it on GitHub:
https://github.com/RIOT-OS/RIOT/pull/12196#pullrequestreview-286390727
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.riot-os.org/pipermail/notifications/attachments/20190910/7395b2f3/attachment.htm>


More information about the notifications mailing list