[riot-notifications] [RIOT-OS/RIOT] cpu/sam0_common: flashpage: add functions to write to user config area / AUX page (#14512)

Francisco notifications at github.com
Tue Nov 10 09:06:14 CET 2020


@fjmolinas commented on this pull request.

Generally code looks good, some comments inline, I see @jue89 already gave it a test so seems to be working fine.

> + * @param   cfg     New MCU configuration, may be NULL.
+ *                  In that case, this will clear the remaining user area
+ *                  and apply the old configuration again.

What exactly is the "old configuration"?

> +/**
+ * @brief   Write data to the user configuration area.
+ *          This will write data to the remaining space after @see nvm_user_page_t
+ *          The size of this area depends on the MCU family used.
+ *
+ *          Will only write bits 1 -> 0. To reset bits to 1, call @see sam0_flashpage_aux_reset
+ *          This will reset the whole user area configuration.
+ *
+ *          Arbitrary data lengths and offsets are supported.
+ *
+ * @param   offset  Byte offset after @see nvm_user_page_t
+ *                  must be less than `FLASH_USER_PAGE_AUX_SIZE`
+ * @param   data    The data to write
+ * @param   len     Size of the data
+ */
+void sam0_flashpage_aux_write_raw(uint32_t offset, const void *data, size_t len);

Do we need a new function for this, can't `flashpage_write_raw` be used? Isn't just the address different?

> +    /* invalidate cache */
+#ifdef CMCC
+    CMCC->MAINT0.bit.INVALL = 1;
+#endif

Why is this done?

> +/**
+ * @brief   Write data to the user configuration area.
+ *          This will write data to the remaining space after @see nvm_user_page_t
+ *          The size of this area depends on the MCU family used.
+ *
+ *          Will only write bits 1 -> 0. To reset bits to 1, call @see sam0_flashpage_aux_reset
+ *          This will reset the whole user area configuration.
+ *
+ *          Arbitrary data lengths and offsets are supported.
+ *
+ * @param   offset  Byte offset after @see nvm_user_page_t
+ *                  must be less than `FLASH_USER_PAGE_AUX_SIZE`
+ * @param   data    The data to write
+ * @param   len     Size of the data
+ */
+void sam0_flashpage_aux_write_raw(uint32_t offset, const void *data, size_t len);

If its just for padding reasons the padding logic might be able to be generalized, a lot of the arch could do the same, few CPU's can do writes from !`erase_state` - > `erase_state` without a page/sector erase.

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