[riot-notifications] [RIOT-OS/RIOT] boards/stm32f1f3: model clock configuration in Kconfig (#15001)

Leandro Lanzieri notifications at github.com
Wed Nov 25 11:58:49 CET 2020


@leandrolanzieri commented on this pull request.

In general the Kconfig additions look good, just one minor comment

>  config CLOCK_PLL_PREDIV
-    int "PLLIN division factor" if CUSTOM_PLL_PARAMS && !CPU_LINE_STM32F031X6 && !CPU_LINE_STM32F042X6
-    default 2 if CPU_LINE_STM32F031X6 || CPU_LINE_STM32F042X6
+    int "PLLIN division factor" if CUSTOM_PLL_PARAMS && !CPU_LINE_STM32F031X6 && !CPU_LINE_STM32F042X6 && !CPU_LINE_STM32F303X8
+    # iotlab based boards provide a 16MHz HSE so they need a predivider of 2
+    # to remain with a 72MHz sysclk by default.
+    default 2 if CPU_LINE_STM32F031X6 || CPU_LINE_STM32F042X6 || CPU_LINE_STM32F303X8 || (CPU_FAM_F1 && (BOARD_IOTLAB_M3 || BOARD_IOTLAB_A8_M3 || BOARD_FOX))

Do you think it is possible to generalize this with a feature instead of specifying the boards here?

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