[riot-notifications] [RIOT-OS/RIOT] Is ADC driver implemented for SAMD21G18A? (#16267)

Ichiro Kuroki notifications at github.com
Sun Apr 4 17:08:59 CEST 2021


For ADC, I got the following configuration:

#define ADC_PRESCALER                       ADC_CTRLB_PRESCALER_DIV512

#define ADC_NEG_INPUT                       ADC_INPUTCTRL_MUXNEG_GND
#define ADC_GAIN_FACTOR_DEFAULT             ADC_INPUTCTRL_GAIN_1X
#define ADC_REF_DEFAULT                     ADC_REFCTRL_REFSEL_INT1V

static const adc_conf_chan_t adc_channels[] = {
    /* port, pin, muxpos */
    {GPIO_PIN(PA, 2), ADC_INPUTCTRL_MUXPOS_PIN0},    
    {GPIO_PIN(PB, 2), ADC_INPUTCTRL_MUXPOS_PIN10},
    {GPIO_PIN(PA, 11), ADC_INPUTCTRL_MUXPOS_PIN19},
    {GPIO_PIN(PA, 10), ADC_INPUTCTRL_MUXPOS_PIN18},
    {GPIO_PIN(PB, 8), ADC_INPUTCTRL_MUXPOS_PIN2},
    {GPIO_PIN(PB, 9), ADC_INPUTCTRL_MUXPOS_PIN3},
    {GPIO_PIN(PA, 9), ADC_INPUTCTRL_MUXPOS_PIN17},
    {GPIO_PIN(PB, 3), ADC_INPUTCTRL_MUXPOS_PIN11},
};

But on my board, the ADC pin starts working only if it is also described in the configuration for PWM and the pwm_init function was called. I managed to find out that the execution of the following code makes the ADC pin start working:

file: cpu/sam0_common/periph/pwm.c
function: poweron
code:
GCLK->CLKCTRL.reg = GCLK_CLKCTRL_CLKEN
                      | GCLK_CLKCTRL_GEN(cfg->gclk_src)
                      | GCLK_CLKCTRL_ID(cfg->tim.gclk_id);
PM->APBCMASK.reg |= cfg->tim.pm_mask;


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