[riot-notifications] [RIOT-OS/RIOT] stm32/periph/uart: set flow control bits before enabling uart (#15725)
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Fri Jan 8 11:38:01 CET 2021
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The STM32 datasheets specify that in order to enable hardware flow control, the `CTSE` and `RTSE` bits should be set. It also states that these have to be set _before_ the `UE` bit is set.
In RIOT, the `CTSE` and `RTSE` bits were set _after_ the `UE` bit was already set. Because of this, the state of `RTSE` and `CTSE` were never actually changed. By moving the bit of code that sets `CTSE` and `RTSE` to a point before `UE` is set, hardware flow control is being enabled correctly.
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The bug was found and tested using a custom board developed internally. This board uses a modem which requires hardware flow control.
We noticed no data was being transmitted when using RIOT's hardware flow control. When manually controlling the flow control pins using the gpio functions, data was flowing but with some bytes randomly disappearing.
After this change, data was flowing and there was no more loss of data.
When running the current code using a debugger, it can be seen that `RTSE` and `CTSE` stay low even after RIOT sets them. With this change, `RTSE` and `CTSE` are set after `uart_init()` has been executed.
### Issues/PRs references
Examples: Fixes #1234. See also #5678. Depends on PR #9876.
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-- Commit Summary --
* stm32/periph/uart: set flow control bits before enabling uart
-- File Changes --
M cpu/stm32/periph/uart.c (18)
-- Patch Links --
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