[riot-notifications] [RIOT-OS/RIOT] cpu/qn908x: Implement blocking SPI support (#15689)

iosabi notifications at github.com
Sun Jan 17 17:31:00 CET 2021


@iosabi commented on this pull request.



> +only implements the Controller mode, the hardware is capable of operating in
+Peripheral mode as well so we use the COPI/CIPO names.
+
+### SPI configuration example (for periph_conf.h) ###
+
+The following example uses only one hardware CS (number 0) and leaves the rest
+unused. Check the user manual for the full list of CS pins available.
+
+    static const spi_conf_t spi_config[] = {
+        {
+            .dev            = SPI0,
+            .copi_pin       = GPIO_PIN(PORT_A, 4),
+            .cipo_pin       = GPIO_PIN(PORT_A, 5),
+            .clk_pin        = GPIO_PIN(PORT_A, 30),
+            .cs_pin         = {
+                GPIO_PIN(PORT_A, 3),

HW CS is automatic and will always have the timing right (you can configure how long should we wait between CS down and the first byte, as well as how long should we leave after the last byte before pulling CS up again). HW CS allows to schedule multiple DMA SPI transfers without having to run an ISR to toggle the GPIO and schedule the next transfer. Everything is still possible with a GPIO from what I can see, but HW CS might have a bit better performance overall.  

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