[riot-notifications] [RIOT-OS/RIOT] riscv_common: Refactor common fe310 code to riscv_common (#15718)

Alexandre Abadie notifications at github.com
Tue Jan 19 18:16:08 CET 2021


Without the following patch, the build is broken for application requiring irq/timer:

```diff
index c66b62719e..2582e92261 100644
--- a/cpu/riscv_common/Makefile.dep
+++ b/cpu/riscv_common/Makefile.dep
@@ -4,6 +4,8 @@ USEMODULE += riscv_common
 # include common periph code
 USEMODULE += riscv_periph_common
 
+FEATURES_REQUIRED += periph_coretimer periph_plic
+
 USEMODULE += periph_pm
 
 # Make calls to malloc and friends thread-safe
diff --git a/cpu/riscv_common/Makefile.features b/cpu/riscv_common/Makefile.features
index 6880670a79..f0eca40db5 100644
--- a/cpu/riscv_common/Makefile.features
+++ b/cpu/riscv_common/Makefile.features
@@ -6,6 +6,7 @@ FEATURES_PROVIDED += periph_cpuid
 FEATURES_PROVIDED += periph_plic
 FEATURES_PROVIDED += periph_pm
 FEATURES_PROVIDED += ssp
+FEATURES_PROVIDED += periph_coretimer periph_plic
 
 # RISC-V toolchain on CI does not work properly with picolibc yet
 ifeq (,$(RIOT_CI_BUILD))
```

I'm not sure that declaring the coretimer/plic as peripherals is the way to go. You could simply add them to the riscv_common module. But maybe I'm missing something here ?

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