<p>Copy from drivers/include/net/netdev.h,  What is this mean?</p>
<pre><code> * # The Interrupt Context Problem                                                                                                                                                                                 
 *                                                                                                                                                                                                                 
 * Network devices are typically connected to the host CPU via some sort of bus,                                                                                                                                   
 * most commonly via SPI. This type of connection has the                                                                                                                                                          
 * disadvantage, that the bus is not used by the network device alone, but it                                                                                                                                      
 * may be shared with other devices. This makes it necessary to synchronize                                                                                                                                        
 * access to the bus to prevent bus access collisions.                                                                                                                                                             
 *                                                                                                                                                                                                                 
 * To illustrate this behavior, let's look at a typical error situation, that                                                                                                                                      
 * leads to a very hard to find and debug latent failure: say we have two                                                                                                                                          
 * devices A and B on the same SPI bus. Our CPU is now transferring a chunk of                                                                                                                                     
 * 100 bytes to device A. After 20 bytes were transferred, device B triggers                                                                                                                                       
 * an external interrupt on the host CPU. The interrupt handling now typically                                                                                                                                     
 * requires the reading of some sort of status register on the 'triggering'                                                                                                                                        
 * device, device B in this case. So what would happen here, is that the device                                                                                                                                    
 * driver for device B would initiate a new SPI transfer on the already used bus                                                                                                                                   
 * to read B's status register -> BAM.                                               

</code></pre>

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