<p><b>@gosticks</b> commented on this pull request.</p>

<hr>

<p>In <a href="https://github.com/RIOT-OS/RIOT/pull/11866#discussion_r305533054">cpu/cc3200/periph/spi.c</a>:</p>
<pre style='color:#555'>> +{
+       spi_transfer_bytes(bus, cs, cont, &out, 0, 1);
+       return SPI_OK;
+}
+
+void spi_transfer_bytes(spi_t bus, spi_cs_t cs, bool cont, const void *out,
+                       void *in, size_t len)
+{
+       /* TODO: handle cs and cont for */
+       (void)cont;
+
+       /* disable or enable cs */
+       if (cs == GPIO_UNDEF) {
+               spi(bus)->ch0_conf &= ~MCSPI_CH0CONF_FORCE;
+       } else {
+               spi(bus)->ch0_conf |= MCSPI_CH0CONF_FORCE;
</pre>
<p>since <code>MCSPI_CH0CONF_FORCE</code> has nothing to do with chip select I enable and disable it before every spi transfer independant of cs . I've added the missing cs code so that should be fine now.<br>
Thank you</p>

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