<p><b>@gosticks</b> commented on this pull request.</p>

<hr>

<p>In <a href="https://github.com/RIOT-OS/RIOT/pull/11866#discussion_r306971853">cpu/cc3200/cpu.c</a>:</p>
<pre style='color:#555'>> +                ((HWREG(OCP_SHARED_BASE + OCP_SHARED_O_GPIO_PAD_CONFIG_1) &
+                  ~0xF));
+    }
+
+    if ((HWREG(OCP_SHARED_BASE + OCP_SHARED_O_GPIO_PAD_CONFIG_2) & 0xF) ==
+        0x1) {
+        HWREG(OCP_SHARED_BASE + OCP_SHARED_O_GPIO_PAD_CONFIG_2) =
+                ((HWREG(OCP_SHARED_BASE + OCP_SHARED_O_GPIO_PAD_CONFIG_2) &
+                  ~0xF));
+    }
+
+    /* DIG DCDC VOUT trim settings based on PROCESS INDICATOR */
+    if (((GPRCM->GPRCM_EFUSE_READ_REG0 >> 22) & 0xF) == 0xE) {
+        HWREG(HIB1P2_BASE + HIB1P2_O_DIG_DCDC_VTRIM_CFG) =
+                ((HWREG(HIB1P2_BASE + HIB1P2_O_DIG_DCDC_VTRIM_CFG) &
+                  ~(0x00FC0000)) |
</pre>
<p>My guess is it sets the Voltage trimming for a circuit connected to the FUSE ROM (again a closed sourced patented TI module). It seems to store some read only factory set values, at least that's what it was doing on a different board <a href="https://e2e.ti.com/support/processors/f/791/t/506957?Fuse-ROM-of-AM335x" rel="nofollow"><br>
Fuse ROM of AM335x</a>.</p>

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