[riot-users] About SPIs on NUCLEO-F411 and STM32F4xx in general

Iliyan Stoyanov ilf.stoyanov at gmail.com
Sat Feb 3 01:18:51 CET 2018


I have a question about the amount of usable SPIs on the NUCLEO-F411 board.
By default the MPU supports 5 SPI, however there is only one SPI described
in the periph_conf.h. Is it just a question of adding a second (or third)
one in the file, as long as GPIOs don't overlap with other periphery, or is
it more complicated than that. It is a generic question actually, in case I
decide to make my own custom board but want to use some MPU that is well
supported either from F1 or F4 series.

I actually don't have a nucleo-f411 at hand, but I'm going to get 1 or 2,
so I can play around with the F4s but I just want to know how complicated
would be to use 3 SPIs on the board for example.

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